1. Field of the Invention
The present invention relates to an active matrix substrate on which a plurality of pairs of a thin-film transistor (TFT) and a pixel electrode are arranged in array, and a liquid crystal device including the active matrix substrate.
2. Description of Related Art
Liquid crystal devices, which are a type of flat panel displays, have various merits including low power consumption, small size, and light weight, and because of such merits, they have been widely used in the monitors of personal computers and mobile information terminals, and in the display devices of TV sets and the like. Further, EL (electroluminescence) devices, which are self-luminous type devices and are characterized by a wide viewing angle, a high contrast, a high-speed response, and the like, have also come into use as devices for flat panel displays.
As for the thin-film transistor (TFT) that is used as a pixel switching element in active matrix type liquid crystal devices or EL devices, the MIS structure including a channel layer composed of at least one semiconductor film (typically, silicon film) has been widely adopted.
There are various types of TFTs including an inverted staggered type and a top-gate type. Further, the semiconductor film forming the channel layer also has various types including an amorphous semiconductor film and a crystalline semiconductor film. The types of the TFT and the semiconductor film are selected as appropriate based on the usage and the required properties of the device in which they are provided.
In recent years, in order to achieve a narrower frame and/or a reduction in costs in the liquid crystal devices and EL devices, the development of drive-circuit-integrated type devices, in which drive circuits such as a source driver and a gate driver using driving TFTs are formed on the same substrate as the pixel area including pixel switching TFTs, has been in progress. By forming the drive circuits on the same substrate as the pixel area, the costs required for external IC chips can be reduced. Further, since the need for the area in which the IC chips are mounted can be eliminated, it is possible to achieve a narrower frame.
Since a larger driving voltage is applied on the driving TFTs for a longer time in comparison to the pixel switching TFTs, the degradation of the electrical characteristics is larger in the driving TFTs than in the pixel switching TFTs. Therefore, for the driving TFTs, it is desirable to use a crystalline semiconductor film which has high reliability and large mobility. Examples of the crystalline semiconductor film include a polycrystalline semiconductor film and a microcrystalline semiconductor film.
In the past, as a method of forming a crystalline semiconductor film such as a polycrystalline semiconductor film and a microcrystalline semiconductor film, there are several well-known methods including a method of transforming an amorphous semiconductor film into a polycrystalline state by laser annealing in which the amorphous semiconductor film is formed on a gate insulating film, which serves as a primary film, and then irradiated with a laser beam (Japanese Unexamined Patent Application Publication No. 2003-17505 (claim 1 and so on) (Patent literature 1)), and a method in which a microcrystalline semiconductor film is directly formed by a plasma CVD (Chemical Vapor Deposition) method (Japanese Unexamined Patent Application Publication No. H08-97436 (paragraph 0041 and so on) (Patent literature 2)).
To produce TFTs, a plurality of photolithography processes need to be carried out. However, it has been desired to reduce the number of such photolithography processes in terms of the productivity. Therefore, in the inverted staggered type TFTs, back-channel etch type TFTs in which the rear surface of the channel is etched have been often used because the number of necessary photolithography processes for the production is relatively small.
When a crystalline semiconductor film is used as the channel layer in the above-described back-channel etch type TFT, an amorphous semiconductor film is stacked on the crystalline semiconductor film. This process is necessary because of the following reason.
When the back-channel etching is performed, it is very difficult to ensure the etching selectivity between the ohmic contact layer (n-layer) connected to the source/drain electrode and the semiconductor film of the channel layer. Therefore, in consideration of variations in the film-thickness of the n-layer within the substrate surface and variations in the etching rate, it is necessary to increase the film-thickness of the semiconductor film of the channel layer and sufficiently increase the etching time.
However, in the method disclosed in Patent literature 1 in which an amorphous semiconductor film is transformed into a polycrystalline state by laser annealing, if the first-formed amorphous semiconductor film is formed with a large thickness, the amorphous semiconductor film cannot be sufficiently melted to the bottom. As a result, it is very difficult to form a crystalline semiconductor film having excellent crystallinity through the entire thickness to the interface portion with the gate insulating film. Further, in the method disclosed in Patent literature 2 in which a microcrystalline semiconductor film is directly formed by a plasma CVD method, the film-formation rate of the microcrystalline semiconductor film is very low. As a result, there is a problem that when the semiconductor film is formed with a large thickness, the throughput is significantly lowered.
Therefore, an amorphous semiconductor film having a relatively high film-formation rate is stacked on the crystalline semiconductor film formed by laser annealing or a plasma CVD method in order to ensure the process margin for the back-channel etching.
The crystalline semiconductor film has higher hole mobility than that of the amorphous semiconductor film. Therefore, it is believed that because of light-irradiation from a backlight or the like provided in a transmission type liquid crystal device, for example, hole-electron pairs are generated and they are moved through the crystalline semiconductor film by the application of an external voltage. When a voltage is applied between the source and drain electrodes of a TFT while applying a negative bias voltage to the gate electrode, hole carriers flow between the source and drain electrodes and therefore a leak current is generated. When the liquid crystal device is used as a display device, crosstalk and the like could appear due to this leak current, thus deteriorating the display quality.
To cope with the above-described problem, it is conceivable to suppress the generation of electron-hole pairs due to the photo excitation by disposing all the semiconductor films within the formation area of the gate electrodes and thereby blocking light coming from behind the semiconductor films by the gate electrodes. However, even if such countermeasures are taken, when a TFT is in an Off-state, a negative bias voltage is applied to the gate electrode and a hole accumulation layer is thereby formed in the crystalline semiconductor film. As a result, a current flows through the contacting portion between the source/drain electrode and the crystalline semiconductor film, thus causing a leak current.
In Japanese Unexamined Patent Application Publication No. 2003-131261 (Patent Literature 3), metal light-shielding films (3, 5) are formed on a substrate and a TFT is formed above these layers with an insulating layer (8) interposed therebetween (claim 1 and FIG. 2). However, in this configuration, it is necessary to form metal light-shielding films (3, 5) and an insulating film (6) in addition to the other essential components of the TFT. As a result, the number of photolithography processes increases and therefore it is not desirable in terms of the productivity.